GPS-Disciplined Oscillator (GPSDO) - Achieving 40ppb Accuracy

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This technical documentation has been proofread by Claude-Sonnet-4 for readability, grammar, and formatting consistency. All technical content, project details, circuit designs, measurements, and conclusions have been verified and approved by the author.

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Project Overview

The GPS-Disciplined Oscillator (GPSDO) project aims to create a precision frequency reference by locking a high-quality oven-controlled crystal oscillator (OCXO) to GPS timing signals. This project achieved at minimum 40 parts-per-billion (ppb) long-term frequency accuracy (limited by testing device).

System Architecture

The system consists of several key components:

Core Hardware

• Microcontroller: STM32F030 running at 48MHz
• OCXO: CTI OC12SC36 with ±20ppm initial accuracy (salvaged from used signal generator)
• GPS Module: u-blox NEO-6M with 1PPS output
• DAC: 12-bit DAC7563
• DAC: CDCV304PWR(REV1) / LMK1C1104(REV2)

Control Algorithm

The heart of the system is a custom diverging control algorithm with dead-zone handling:

static uint16_t current_dac = 0x8000;

void set_dac(int inc) {
  current_dac += inc << 4;
  HAL_GPIO_WritePin(ADC_CS_GPIO_Port, ADC_CS_Pin, GPIO_PIN_RESET);
  uint8_t d[3] = {8, current_dac >> 8 & 0xff, current_dac & 0xff};
  HAL_SPI_Transmit(&hspi1, d, 3, 0);
  HAL_GPIO_WritePin(ADC_CS_GPIO_Port, ADC_CS_Pin, GPIO_PIN_SET);
}

void update_dac() {
  int sum = 0;
  for (int i = 0; i < RING_SIZE; i++) {
    sum += ring[i];
  }
  set_dac(-sum / RING_SIZE);
}

The algorithm uses a ring buffer to average phase measurements, implementing a form of PI control with adjustable gain.

Technical Challenges & Solutions

Challenge 1: Component Substitution

When my specified clock buffer went out of stock, I selected a pin-compatible alternative without thoroughly reviewing the datasheet. The replacement lacked internal pull-up resistors on the enable pin, resulting in unpredictable behavior.

Solution: Hot-wired a jumper directly to the PCB - a reminder that every datasheet detail matters!

Challenge 2: Control Loop Instability

Initial testing revealed oscillation in the control loop when the OCXO approached lock.

Solution: Getting rid of PID, I developed a custom diverging algorithm with dead-zone control. When phase error falls within ±2 counts, the system stops adjusting, preventing hunting behavior.

Measurement Results

Testing was performed using Keysight CXA signal analyzer and EXG vector signal generator as reference.

The spectrum analysis shows:

• Center Frequency: 10.000000 MHz (exact)
• Output Power: +12.06 dBm
• Phase Noise: Better than -70 dBc/Hz at 1Hz offset (limited by testing equipment)

With a 10Hz span and 1Hz resolution bandwidth, the signal shows excellent short-term stability with no visible sidebands or spurious content.

PCB Design Notes

The PCB was designed in Altium Designer with the following considerations:

• 4-layer stackup: Signal-Ground-Power-Signal for optimal EMI performance
• Thermal isolation: The OCXO section is thermally isolated from the MCU and GPS module
• Star grounding: Analog and digital grounds meet at a single point under the DAC
• Controlled impedance: 50Ω traces for the RF output path

Future Improvements

1. Kalman Filter Implementation: Replace the simple averaging with a Kalman filter for better noise rejection
2. Custom PCB Rev 2: Fix the thermal issues with proper copper pour optimization
3. GPS Holdover: Add a rubidium backup for GPS signal loss scenarios
4. Remote Monitoring: Add WiFi/Ethernet for SNMP-based monitoring

Applications

This GPSDO is suitable for:

• Amateur radio frequency calibration
• Test equipment reference
• Time-nuts experiments
• SDR frequency stabilization

Resources

• Schematic: Available on request
• Firmware: GitHub Repository (coming soon)

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Have questions about this project? Feel free to reach out via the Contact page.